AT9173 DATASHEET PDF

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AT9173 DATASHEET PDF

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High frequency decoupling capacitors should be placed as close to the power pins of the load as physically possible. A multi-layer printed circuit board is recommended.

(PDF) AT9173 Datasheet download

The power dissipated in the linear regulator is: The feedback resistors should be located as close as possible to the Eatasheet pin dtaasheet vias tied straight to the ground plane as required. For surface mount designs, solid tantalum capacitors can be used, but caution must be exercised with regard to the capacitor surge current rating. These equations assume linear voltage-current datasgeet where IO is the maximum dataseet current and VOUT is the nominal output voltage of the linear regulator.

The actual Modulator Gain has a high gain peak due to the high Q factor of the output filter and is not shown in Figure 6. These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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To insure that both upper and lower pass transistors dissipate the same power, tie this pin to the VGMCH output rail. For reliable operation, select bulk capacitors with voltage and current ratings above the maximum input voltage and largest RMS current required by the circuit.

Any parasitic inductance in the switched current path generates a large voltage spike during the switching interval.

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Using the above guidelines should give a Compensation Gain similar to the curve plotted. All other regulators are monitored for under-voltage events.

If the Fault Reset Counter reaches a count of before another fault occurs, then the Fault Counter is cleared to 0. A9173 ripple voltage and current are approximated by the following equations: The switching losses seen when sourcing current will be different from the switching losses seen when sinking current.

Consult with the manufacturer of the load on specific decoupling requirements. Their voltage rating should be at least 1.

Information furnished by Intersil is believed to be accurate and reliable. In order to dissipate heat generated by the internal VTT LDO, the ground pad, pin 29, should be connected to the internal ground plane through at least four vias. There fatasheet two sets of critical components in the ISL switching converter.

This allows the VTT rail to float. Use copper datasheeg polygons on the top and bottom circuit layers for the phase nodes. There is no need for external programming resistors.

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The switching components should be placed close to the ISL first. This allows the termination voltage to float during the S3 sleep state. The voltage at this pin is regulated to 0. The following equations give the approximate response time interval for dafasheet and removal of a transient load: OCP on the Switching Regulator?

In most cases, multiple electrolytic capacitors of small case size perform better than a single large case capacitor. The synchronous buck converter uses voltagemode control with fast transient response.

Use only specialized low-ESR capacitors intended for switching-regulator applications for the bulk capacitors. It is typically connected to the 5V standby rail of an ATX power supply.

Connect this pin to the VTT output at the physical point of desired regulation. Each output is monitored for undervoltage events. The power dissipation includes two loss components; conduction loss and switching loss. This allows the ISL to attempt at least one full soft-start sequence to restart the faulted regulators. Dedicate another solid layer as a power plane and break this plane into smaller islands of common voltage levels.

Integrated Thermal Shutdown Protection?